CN064  Automatic Video Security System Based on Face-Recognition and Wireless Communication
Ming-Liang Su, Zi-Jun Chen, Bo-Ya Lai, and Zhi-Yong Pang
School of Physics and Engineering, Sun Yet-Sen University

Abstract— A new kind of automatic video security system based on face-recognition & wireless communication is introduced in this article, including its design method, hardware and software architecture, and its operation results. In this system, the face images captured by the camera will be compared with the criminal face images in the original database, and the similarities between the two faces will be counted. If the similarity is higher than the threshold, an alarm signal will be sent out. The system consists of two parts. The first part is based on FPGA, which includes DE2-70 board offered by Altera corp. and peripherals such as analogical camera & CDMA Modem, etc. First, amount the hardware architecture, modules described by Verilog HDL and SOPC, within which Nios-II processor has been added, are built. Second, amount the software architecture, software is described by C/C++, a μC/OS-II is transplanted & customized tasks have been set. The function of part 1 are face-detection, face image interception, JPEG encoding & MMS (enveloping the JPEG face image) transmission. As to the second part, it is based on the PC program described by C/C++. The only peripheral in this part is another CDMA modem. The function of part 2 are MMS reception, JPEG files extraction & face-recognition (PCA). The system makes use of the advantages of FPGA, such as high operating speed, high integrated level & great convenience, etc. It also makes use of the existing wireless communication network & the PC which is highly efFigient in calculation, compared to FPGA. Therefore, a possible pattern of FPGA—remote wireless communication–PC combined system for video surveillance & intelligent modes-recognition have been introduced.
Keywords— FPGA; DE2-70; Nios-II; SOPC, Altera; μC/OS-II; face-recognition; PCA; CDMA; MMS

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CN068  Multi-channel Radio Spectrum Monitoring System
Qiang Li, Xiang Jing, and Yan-Xiong Zhang
School of Electronic Engineering, University of Electronic Science and Technology of China

Abstract— As the radio signal has a large range bandwidth and is complicated, here a digital multi-channel monitoring system is designed. The system tunes the frequency of wide bandwidth radio signal via controlling the RF terminal, processing the baseband data by a variable bandwidth digital down conversion, finally, applying the digital processing algorithm to obtain the spectral information. Here four scan modes are designed to monitor the radio signal effectively from different angles. The software radio technology is applied so that the system can update efficiently without changing the hardware architecture. Finally, the spectrum processing result is demonstrated in the software.
Keywords— Radio signal monitoring system; Software radio technology; Variable bandwidth digital down conversion; RF terminal; Multi-channel; Spectrum processing

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CN069  A Fisheye Lens 360 Degree Panoramic Monitoring System Based on the FPGA
Da-Peng Lan, Jiang-Hui Deng, Rui-Bin Liu, Feng Li, and Zhi-Yong Pang
School of Physics and Engineering, Sun Yet-Sen University

Abstract— This paper designs and implements a panoramic monitoring system based on the FPGA fisheye lens. Fisheye images produced suffer from severe distortion. Therefore, it must be corrected to approximately rectilinear versions. Nowadays, most of the algorithms used to correct the fisheyes distortion are realized by software. In this paper, we compared three algorithms used for panoramic monitoring system. And the obtained result of the spherical perspective projection algorithm is promising. The spherical perspective projection algorithm is implemented on a FPGA and a panoramic monitoring has been achieved in a SOPC system.
Keywords— FPGA; panoramic monitoring; fisheye; spherical perspective projection; SOPC

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CN072  3D Scanning and Modeling System Based on FPGA
Yu-Ning Jiang1, Zi-Hong Su, and Shui-Sheng Xiao
Department of Microelectronics, School of Physics and Engineering, Sun Yat-Sen University

Abstract— 3D scanning is an important technology for today’s 3D applications, especially when a universal model of a real-world object is needed. Laser scanning techniques are developed, but it is difficult for it to be common used because of their complexity and high costs. A 3D scanning and modeling system with non-contact passive techniques is presented in this paper. The system is based on Altera’s Cyclone II FPGA, and by using the SOPC tools, components related to the system are integrated on the FPGA chip. We came up with image processing and modeling algorithms that are very suitable for FPGA, and made a simulation in MATLAB, the algorithms turn out to be fast and robust. And the paper shows the concrete architecture of our design. The system is cheap, simple in structure, highly integrated, relatively independent, and can make 3D models in .STL form.
Keywords— 3D; scanning; modeling; FPGA; MATLAB; SOPC; image processing

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CN099  An Intelligent Reader Based on Nios II
Wei-Liang Xu, Duo-Hua Xu, and Wen-Yan Chen, and Zhi-Yong Pang
School of Physics and Engineering, Sun Yet-Sen University

Abstract— With the rapid development of Human-Computer interaction techniques, the hand is no longer the only input means of human physique structure. This paper describes an intelligent reader system, which based on head movements for the man-machine interface, realizes the operations like zooming, page-turning and row-scrolling on the reading interface, through the rough face detection and localization of facial feature points to achieve the tack and recognition of head movements.
Keywords— face detection; facial complexion model; facial feature points positioning; head motion identification; FPGA; SOPC; Nios II

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CN100  Design of PET Bottle Cap Defect Online Detection System Based on FPGA
Xin-Hua Qiu, Yun Xie, Yu-Mei Zhou, and Wei Qiu
Faculty of Automation, Guangdong University of Technology

Abstract— This paper designed an online detection system based on FPGA, which was used to detect if there is defect in the internal and external ring of the PET bottle cap and stains in the steal of the bottle cap. Based on the hardware platform whose core processor is EP4CE115F29, taking advantage of the parallelism and pipeline of the FPGA ,this system detect the internal ring, external ring and the steal of the bottle cap , then make a judgement. The MegaWizard module named Median Filter was used to smooth the image and threshold value segmentation was used to extract the part in which we are interested, and then judge whether there is stain in it. We used the projection of the gray level to get the center of the bottle cap, and then comparing with the center gravity to judge if the bottle cap is qualified. What is more, the edge detection arithmetic named Scharr was used to calculate the circular degree of internal ring, then judge if there is a defect. By experimenting repetitively, the arithmetic is useful that the system can detect the PET bottle cap efficiently. The number of the bottle cap detected the bottle is more than 50000, and the detection precision is 3.
Keywords— PET bottle cap; defect detection; smooth process; threshold value segmentation; edge detection

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CN107  Design and Implementation of Nios II-based LCD Touch Panel Application System
Tong Zhang, Wen-Ping Ren, Yi-Dian Yin, and Song-Hai Zhang
School of Information Science and Technology, Yunnan University

Abstract— This paper explains a system design for developing LCD touch panel applications by means of embedded system approach. Two Avalon-compatible IPs, acting as the LCD-display controller and the touch panel ADC controller are designed respectively for Nios II-centered SOPC. To verify the design, a game software named Lianliankan is developed on a SOPC containing the two custom IPs. The result indicates that the design has good usability, and satisfies the demand of application development better.
Keywords— touch panel; Intellectual Property; Nios II; Avalon; system-on-a-programmable-chip (SOPC)

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CN122  The Permanent Magnet Synchronous Motor Vector Control System Based on FPGA
Li-Zhi Wu, Peng-Fei Chen, and Jin-Hui Liu
Guangdong University of Technology

Abstract— In this paper, an FPGA chip and the external circuit is to achieve permanent magnet synchronous motor vector control system. Using Altera's Cyclone III EP3C25Q240C8N, rich programmable logic on-chip resources are utilized to realize the vector control of the system. Moreover, the right circuit of sampling and conditioning is the key point to the reliability of Closed-loop system. Finally, the experimental results show that Speed can follow the instruction and closed-loop system is reliable.
Keywords— FPGA；Vector control；Closed-loop system

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CN141  The Production and Research for Humanoid Robot
Can-Yu Liu, Bo Hu, Hai Tian, and Yang Li
Communication and Engineering, Harbin Engineering University

Abstract— Humanoid robot that has always been a dream for humankind to develop has the external behavior of human beings, human intelligence and flexibility, the ability to communicate with people and constantly adapt to the environment. It is humanoid robot that is designed to imitate. The morphology and behaviour are from human. Generally, it has the humanoid limbs and head. We have produced the humanoid robot by CAD software and designed the robot’s structures according to human. The control panel consists of CycloneⅡand MSP430.It can be achieved to control the robot dancing movements by comprehensive programming.
Keywords— simulation; communicate; Msp430; comprehensive; humanoid robot

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CN147  Music Synthesizer Designed on FPGA
Han Liu, Rong Su, and Hui-Min Dai
Sun Yat-Sen University

Abstract— As touch technology has become a hot spot of human-computer interaction in recent years, we accomplished the design--Music Synthesizer on LCD touch screen. We took use of the resources from board DE2-115, combined with Verilog HDL and C Language under the environment of Quartus II and Nios II Eclipse of Altera’s. In the time when digital music develops in such a high speed, our design can achieve four different kinds of instruments playing and the control of changing the timbre, making more people able to create music themselves under a lower cost.
Keywords— music synthesizer; FPGA design; timbre; SOPC Builder; Nios II

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CN152  Design of A Six-stage Pipelined MIPS Processor Based on FPGA
Qiao-Zhi Sun, De-Chun Kong, Cheng-Long Zhao, and Hui-Bin Shi
Department of Computer Science and Technology, Nanjing University of Aeronautics and Astronautics

Abstract— We design a 32-bit embedded six-stage pipelined processor which is compatible with MIPS instruction set. The six stages make the task of each stage balanced. We use forwarding and stalling to solve data hazards. Control hazards are solved by predicting which instruction should be fetched and when the pipeline will be flushed if the prediction is later determined to be wrong. The processor is implemented in DE2 development board, and its operating clock frequency can be up to 81.7MHz. In the end we present the comprehensive results of the design. Besides, we show the software simulation and hardware verification to prove the correctness of the design.
Keywords— MIPS; embedded; pipelined processor; hazards; FPGA;

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CN156  Embedded Test Technology of Switching Power Supply Based on FPGA
Chen-Min Tong and Chun-Ling Yang
Harbin Institute of Technology, Electrical Engineering and the Automation

Abstract— In this paper, an embedded test technology of switching power supply based on FPGA was introduced to solve the shortcomings exist in the traditional detection methods, such as the complex process of maual detection, long test time, maintenance and support difficult, high cost of maintenance, etc. The FPGA implementation has been achieved on the Cyclone EP2C35F672C6. The results show that it can realize the automatic detection of switching power supply, improve the fault detectionrate and isolation rate of switching power supply, shorten the test time, reduce the test difficulty, improve the life cycle of switching power supply, reduce the life cycle cost of switching power supply, and this equipment is feasible and versatile.
Keywords— FPGA; Switching Power Supply; Embedded Test Technology

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